MediaTek targets 1,000 times better spectral efficiency in 5G chips
MediaTek is setting ambitious goals for its 5G chip R&D project, aiming to leapfrog Qualcomm in the next generation of wireless technology. It says the architecture it is developing is targeting 1,000 times greater spectral efficiency than current mobile chipsets, 100 higher performance, 10 times lower power consumption and five times lower latency.
These aggressive targets do, in fact, mirror some discussed by Qualcomm, but MediaTek is also aiming for a very low cost approach which would make the resulting products suitable for all kinds of connected objects in the Internet of Things. It is harnessing two important emerging elements of modern chip platforms.
One is OpenCL (Open Computing Language), an important enabler of heterogeneous chips with a mixture of different cores (CPUs, graphics processors, digital signal processors, FPGAs and accelerators). Those mixed-core architectures are seen as essential to boosting performance, flexibility and cost/energy efficiency from supercomputers to devices.
Nvidia and Intel are heavy backers of OpenCL, which originated in the graphics field and shields programmers from the complexities of the underlying architecture. AMD, however, has been pushing its own alternative, HSA (Heterogeneous Systems Architecture), and MediaTek’s latest comments may be bad news for that initiative, since the Taiwanese firm has been an HSA participant, along with ARM, Imagination, Qualcomm and Samsung.
The second element of MediaTek’s approach is to use ‘dark silicon’ – the portion of a chip which has to be powered down to avoid overheating. This is rising with new processes, as it has not proved possible to scale down voltage to the same extent as transistor size. Some experts calculate that about one-third of total area in the 20nm technology node (including the emerging 16/14nm 3D FinFET chips), is dark, and this could reach 80% in the 5nm node.
However, MediaTek – in a joint development with Taiwan’s Ministry of Science and Technology, has created a research center which will focus on running OpenCL on a mixture of dark silicon processing units, with their temperature throttled, along with purpose-specific accelerators.
Liang-Gee Chen, an IEEE Fellow who will head up the effort (and is also EVP of academics and research at National Taiwan University), explained that the heterogeneous architecture he envisages would throttle clock speeds to prevent overheating, while using dark silicon techniques to switch off circuits not in use – by choice, to save power, rather than just to avoid excessive heat. The more processing units are involved, the greater flexibility there is to balance performance and power efficiency, by switching elements on and off dynamically.
This is an approach which central to R&D activities in many companies, from ARM to Apple (the latter a major OpenCL supporter). MediaTek hopes to steal a march with the help of national government resources, and so position itself, and the Taiwanese electronics industry, for a leading role in 5G architectures.
“It is hoped that with the research and development efforts of the professors/students and staff engineers from MediaTek under this project, that in 2019-2020 timeframe MediaTek will become the worldwide leader in mobile communications chipset core technology,” Chen told EETimes. By changing the price/performance norms of the current mobile SoC, the firm could also disrupt the business models of its rivals, reducing licensing costs and reducing time to market for new products.
“Tight integration of hardware and software is the key,” Chen continued. “Therefore, the goal of our project is to design and develop key enabling hardware and software techniques for heterogeneous computing to help MediaTeK gain the leading position in this new wave.”
The five teams working on MediaTek’s project will also submit some of their work to standards bodies and to the OpenCL and HSA efforts.